1. Field of the Invention
This invention relates in general to a memory array and methods for manufacturing and operating thereof and more specifically relates to a memory array with trench channels and methods for manufacturing and operating the same.
2. Description of Related Art
As memory devices continue to reduce in size along with the increase in the integration of integrated circuits, the dimension of the buried bit line needs to be reduced correspondingly. Consequently, the punch-through leakage in a memory cell becomes worse and the bit line resistance becomes large. By increasing the junction depth and doping concentration of the bit line to resolve the problem of the increase of the bit line resistance, not only short channel effect may develop, the problem of punch-through leakage may result since the distance between the neighboring bit lines reduces. However, a high dopant concentration can not be used to form a shallow junction bit line to prevent the short channel effect and then the punch-through leakage problem due to a deep junction depth and channel length reduced, the problem of overloading the bit line remains unresolved due to the limitation of doping concentration. Due to above-mentioned, the worse punch-though leakage between the neighboring bit lines and large bit line resistance may still occur which leads to poor operation speed and efficiency of the device. Furthermore, the reliability and the yield of the entire process may be affected.